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HL: Halbleiterphysik

HL 44: Poster II

HL 44.24: Poster

Donnerstag, 11. März 2004, 16:30–19:00, Poster A

Trench-insulated IPG transistors for active matrix displays — •A. Lapanik and A.D. Wieck — Ruhr-Universitaet Bochum, Lehrstuhl fuer Angewandte Festkoerperphysik, Universitaetsstrasse 150, D-44780 Bochum

We already reported on theoretical investigations of IPG transistors (formed by Focused Ion Beams), new techniques of preparation of transistors and results that shows possibilities of using IPG transistors for active matrix liquid crystal displays (AMLCD). Here, we report of further research results on trench insulated IPG transistors on poly-Si on quartz in contrast to previous work on GaAs (1990. Nieder et al). The geometry of IPG transistors was changed to obtain higher process performance and lower leakage current to be more suitable for AMCLD developing. New mask layers were used for sputtering of the Si and we present here results for transistors with a better gate insulation. This is obtained by wider insulating lines between gate and the source-drain areas, respectively. The annealing temperature dependence of the transistor parameters are discussed. Also, we would like to report on the technology improvement of IPG transistor fabrication. In particular, chemical process steps were improved and new were added to perform a No-dqcleaningNo-dq of the sputtered area and sputtered trenches.