Berlin 2005 – scientific programme

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HK: Physik der Hadronen und Kerne

HK 41: Instrumentation und Anwendungen

HK 41.6: Talk

Wednesday, March 9, 2005, 15:15–15:30, TU MA041

FPGA based Pre-/Coprocessors for the ALICE HLT — •Torsten Alt and Volker Lindenstruth — Kirchhoff-Institute of Physics, University of Heidelberg

The Time Projection Chamber (TPC) of the ALICE experiment is one of its main tracking detectors. It produces up to 75 MByte of compressed raw data per event. If the raw data is stored directly to tape, the tape bandwidth of 1.25 GByte/s limits the event rate to 20 Hz. In order to achieve higher rates or to trigger on specific events the raw data needs to be processed online (compression/selection), thereby reducing the data volume significantly without losing physical information.
This processing is done by a cluster of commodity PCs, the High Level Trigger (HLT). To access the raw data dedicated nodes of the HLT are equipped with PCI-cards which receive the data via optical links, the so called Detector Data Link (DDL). Each of the cards possesses an FPGA, a programmable device, which allows processing of the data in customized hardware. In preprocessor mode the raw data is processed and the result is written directly to the main memory of the node. In coprocessor mode the data is read from the main memory, processed and rewritten to the memory. By using FPGAs the processing logic can be adapted to different requirements and reprogrammed within a few milliseconds.
In addition to the physical motivation and the principles of FPGA pre-/coprocessors an ALICE specific algorithm, the ClusterFinder, is introduced.