Berlin 2005 – scientific programme

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MA: Magnetismus

MA 20: Poster:Schichten(1-29),Spintrsp(30-45),Ex-Bias(46-63),Spindyn(64-75),Mikromat.(76-80),Cluster(81-94),Abbv.(95-99),Obflm(100-02),SpElek.(103-09),E-Theo(110-14),Mikromag.(115-16),Spin+PÜ(117-26),Mag.Mat.(127-51),Meth.(152-55),Mol.Mag(156-59),Kondo(160-65

MA 20.33: Poster

Monday, March 7, 2005, 14:00–18:00, Poster TU C

Die level uniformity of magnetic tunnel junctions under lithographic aspects — •Karsten Rott and Hubert Brückl — Universität Bielefeld, Nano Device Group, Universitätsstr. 25, 33615 Bielefeld

The uniform behaviour of magnetic tunnel junctions on a memory or logic chip is an absolutely necessary requirement for product fabrication. The junctions should show an equal and reproducible magnetic switching, the same area resistance and magnetoresistance amplitude. The first issue guarantees a reliable bit setting, the latter two the operation within certain voltage levels predefined by the according CMOS environment. Since the tunnel resistance depends exponentially on the barrier thickness, the deviation from the mean thickness of 0.9 to 1.2 nm should be less than 0.01 nm. Electrical pinholes or defect states have to be avoided. The same arguments hold for the TMR amplitude where a standard deviation of 2% is tolerable. Besides the intrinsic film properties, the additional lithographic procedure is another source of errors and deviations. The impact of lithographic features on the die level uniformity will be discussed in dependence on the cell size. The lateral dimensions of the investigated junctions range from 100 nm up to a few microns.