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HL: Halbleiterphysik

HL 50: Poster II

HL 50.106: Poster

Donnerstag, 30. März 2006, 16:30–19:00, P3

Memory effects in MOS-structures containing nanoclusters — •M. Allardt¹, R. Pietzsch¹, J. Bollmann¹, J. Weber¹, and V. Beyer² — ¹Technische Universität Dresden, 01062 Dresden, Germany — ²Forschungszentrum Rossendorf, 01314 Dresden, Germany

Memory devices based on embedded silicon nanoclusters are prepared by implantation of Si ions into SiO₂ and subsequent annealing [K. H. Heinig, T. Müller, B. Schmidt, M. Strobel, and W. Möller, Appl. Phys. A 77, 17 (2003)]. The charge retention of the metal-oxide-semiconductor (MOS) structures is investigated by capacitance–voltage (CV) measurements. The devices exhibit almost ideal MOS-CV-behavior indicating a low density of interface states. Positive and negative charges can be stored depending on the applied voltage. The programming voltages generate a memory window which seems to be suitable for future device applications. We compare these results to electrical properties of alternative SONOS-memory devices.