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HL: Fachverband Halbleiterphysik

HL 11: Quantum dots and wires: Transport properties I

HL 11.7: Vortrag

Montag, 26. März 2007, 16:30–16:45, H15

SOI-Based Single-Electron Transistors Fabricated by a Combination of Self-Assembly and Self-Alignment Techniques — •Conrad R. Wolf, Klaus Thonke, and Rolf Sauer — Institut für Halbleiterphysik, Universität Ulm, 89069 Ulm

We present a technique to fabricate single-electron transistors (SETs) with silicon quantum dots (QDs) as conducting islands making use of a combination of self-assembly and self-alignment effects. Starting from an ultra-thin silicon-on-insulator (SOI) substrate we employ self-assembled gold colloidal particles as an etch mask. Quantum dots are then fabricated by applying a CF₄ reactive ion etch (RIE) process to remove the silicon layer everywhere except below the gold colloids. A 100-200 nm wide metal wire together with side gate electrodes is patterned by electron beam lithography (EBL) onto the QD-covered sample and a nanometer-sized gap is created in these wires by a controlled electromigration process. The metal wires will preferentially break at the positions of the QDs, because the metal layer is dilated there resulting in a locally higher current density. This leads to a self-alignment effect of the evolving nano-electrodes with respect to the QDs. The native oxide layer covering the silicon QDs is used as a tunneling barrier. Its thickness can optionally be adjusted in a controlled manner by self-limiting thermal oxidation to obtain an accurate tunneling resistance. The devices are electrically characterized at liquid helium temperature and show clear Coulomb blockade behavior, Coulomb staircase features as well as the so-called Coulomb diamonds, typical for SETs.