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HL: Fachverband Halbleiterphysik
HL 13: Poster 1
HL 13.73: Poster
Monday, March 26, 2007, 15:00–17:30, Poster A
Influence of thermal annealing on the memory effect in MIS structures containing crystalline Si nanoparticles — Nicola Nedev1, Diana Nesheva2, Emil Manolov2, Rudolf Brüggemann3, •Sebastian Meier3, Kiril Kirilov4, and Zelma Levi2 — 1Instituto de Ingenieria Universidad Autónoma de Baja California, Benito Juárez Blvd., s/n, C.P. 21280, Mexicali, Baja California, México. — 2Institute of Solid State Physics, Bulgarian Academy of Sciences, 72 Tzarigradsko Chaussee Blvd., 1784 Sofia, Bulgaria. — 3Institut für Physik, Carl von Ossietzky Universität Oldenburg, 26111 Oldenburg, Germany. — 4Department of Solid State Physics and Microelectronics, Sofia University "St. Kliment Ohridski", 5 James Bourchier, 1164 Sofia, Bulgaria.
Silicon nanocrystals embedded in a SiO2 matrix are fabricated by thermal annealing of Metal/SiO2/SiOx/c-Si structures (x=1.15) at 1000 ∘C in N2 atmosphere for 30 or 60 min. High frequency C-V measurements demonstrate that both types of sample can be charged negatively or positively by applying a positive or negative bias voltage to the gate. The clockwise hysteresis windows of 30 and 60 min annealed samples are about 7 and 5.5 V for the ± 12 V scanning range (Eox = ± 2.4 MV/cm), respectively. Although the samples annealed for 60 min have a smaller hysteresis window, they have two important advantages compared to the 30 min annealed ones: a lower defect density at the c-Si wafer/SiO2 interface and a smaller value of the fixed oxide charge close to this interface.