DPG Phi
Verhandlungen
Verhandlungen
DPG

Regensburg 2007 – wissenschaftliches Programm

Bereiche | Tage | Auswahl | Suche | Downloads | Hilfe

HL: Fachverband Halbleiterphysik

HL 35: Devices

HL 35.5: Vortrag

Donnerstag, 29. März 2007, 11:00–11:15, H13

Silicon Epitaxy for vertical Tunnel Field-Effect-Transistors — •Markus Schindler, Oliver Senftleben, Mathias Born, Krishna Kumar Bhuwalka, Matthias Schmidt, and Ignaz Eisele — Institute of Physics, Department of Electrical Engineering, University of the German Federal Armed Forces Munich, Werner-Heisenberg-Weg 39, 85577 Neubiberg,Germany

The vertical tunnel field-effect-transistor (TFET) has been proposed as a candidate for future CMOS structures. The main features are exponentially increasing drain current-gate voltage characteristics and symmetric performance in n- and p-channel operation. Since the tunneling junction is less than 5 nm deposition processes with atomically sharp doping transitions are needed. Dopant diffusion and hence process temperature must be limited. Vertical TFET-structures were already grown by MBE, but a low-temperature CVD-based process suitable for an industrial production enviroment is still lacking. We investigated p- and n-type doped Si-layers grown in a commercial low pressure-CVD-system. The deposition temperature was under 650°C and the samples were characterized by secondary-ion-mass-spectroscopy (SIMS) and scanning electron microscopy (SEM). Deposition rates and doping incorporation show very high efficiency compared to conventional silane/dichlorosilane based epitaxy. As demonstrators we present experimental verification of p-channel tunnel FETs down to i-zones of 70 nm and 25 nm. I-V-characteristics are weakly dependent on temperature and nearly independent on channel length.

100% | Mobil-Ansicht | English Version | Kontakt/Impressum/Datenschutz
DPG-Physik > DPG-Verhandlungen > 2007 > Regensburg