Berlin 2008 – scientific programme

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HL: Fachverband Halbleiterphysik

HL 15: Devices

HL 15.3: Talk

Monday, February 25, 2008, 11:45–12:00, ER 164

Si-based vertical MOSFETs for high temperature applications — •Peter Iskra, Thomas Zilbauer, Dorota Kulaga-Egger, Martin Schlosser, Torsten Sulima, and Iganz Eisele — Universität der Bundeswehr München, Werner-Heisenberg Weg 39, 85579 Neubiberg

The operation of a MOSFET at high temperatures is limited by the collapse of the pn-junctions due to the increase of intrinsic carriers. High doping concentrations may extend the temperature range, but the reduced space charge zone leads to Zener tunnelling. Isolating the channel by two intrinsic zones (n⁺ip⁺in⁺-structure for n-channel MOSFET) decrease the tunnelling probability and furthermore allows the use of higher doping concentrations.
A commercial LPCVD-system was used for the deposition of n⁺ip⁺in⁺-structures, characterized by SIMS. For IV-measurements the epitaxy stacks were structured using reactive ion etching, passivated and metalized. Leakage currents were compared to a standard n⁺p⁺n⁺-structure at different temperatures. First attempts have been made for an application of the n⁺ip⁺in⁺ stack in vertical MOSFETs.