Berlin 2008 – scientific programme

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SYSA: Symposium Tayloring Organic Interfaces: Molecular Structures and Applications

SYSA 4: Organic Devices II

SYSA 4.7: Talk

Tuesday, February 26, 2008, 18:15–18:30, H 2013

C(V) and C(t) measurements on MFIS structures consisting P[VDF/TrFE] as ferroelectric layer — •Karsten Henkel, Bernd Seime, Ioanna Paloumpa, Klaus Müller, and Dieter Schmeißer — Brandenburgische Technische Universität Cottbus, Angewandte Physik - Sensorik, Konrad-Wachsmann-Allee 17, 03046 Cottbus, Germany

Ferroelectric Field Effect Transistors (FeFETs) are considered as a candidate for future non volatile and non destructive readout memory cells. A possible low cost solution is the use of poly[vinylidene fluoride trifluoroethylene] (P[VDF/TrFE]). Using P[VDF/TrFE] we focus on metal ferroelectric insulator semiconductor (MFIS) capacitor structures. In this contribution we will summarize our investigations related to capacitance measurements in dependence of applied bias (C(V)) and time (C(t)). The thickness of the ferroelectric layer as well as the thickness and the material of the buffer layer have been investigated for optimization of the write voltage. CV measurements at higher temperatures deliver decreased flatband voltage shifts within one CV loop resulting in lower memory windows. At temperatures around 100^∘C the hysteresis totally vanished, pointing out the ferroelectric behavior of the system. C(t) measurements at a constant bias have been performed for retention analysis of the MFIS stack. After applying a writing pulse we could distinguish between a higher and a lower capacitance state for more than 5 days. This work is supported by Deutsche Forschungsgemeinschaft within priority program 1157 (SCHM 745/11-2).