Darmstadt 2008 – scientific programme

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HK: Fachverband Physik der Hadronen und Kerne

HK 34: Postersitzung

HK 34.37: Poster

Thursday, March 13, 2008, 14:00–16:00, Poster C3

Implementation of an FPGA-based MDC Track Reconstruction Algorithm for the HADES Upgrade — •Ming Liu, Wolfgang Kuehn, Tiago Perez, Vladimir Pechenov, and Shuo Yang for the HADES collaboration — II.Physikalisches Institut, Justus-Liebig-University Giessen

We present a novel implementation of the MDC track reconstruction algorithm based on modern FPGA technologies. The basic principle of the Dubna track reconstruction algorithm is ported from the previously implemented software into the FPGA fabric. Working as processing modules in compute nodes and together with other feature extraction algorithms, track reconstruction contributes to select interesting events and lower the data rate for storage in real-time. The hardware platform will be the newly constructed ATCA-based compute nodes.

* This work is supported in part by BMBF 6GI 179 and GSI.