Dresden 2009 – scientific programme

Parts | Days | Selection | Search | Downloads | Help

DS: Fachverband Dünne Schichten

DS 13: Thin Film Metrology for Electronics, Photonics, and Photovoltaics I

DS 13.4: Talk

Tuesday, March 24, 2009, 11:30–11:45, GER 38

Electromigration simulation for on-chip Cu interconnects — •Matthias Kraatz¹, Dieter Schmeisser¹, Ehrenfried Zschech², and Paul S. Ho³ — ¹BTU Cottbus, Germany — ²AMD Fab 36 Limited Liability Company & Co. KG — ³University of Texas at Austin, USA

We are investigating the influence of copper microstructure on electromigration degradation effects and interconnect lifetimes using computer simulation. The simulation is carried out in three dimensions. For the copper microstructure, a Monte Carlo technique was used to model the Cu grain growth. Different diffusivities where applied to grain boundaries and top interface of the interconnect model according to the qualitative crystallographic orientation of adjacent grains. The grain boundary network and the top interface form the diffusion paths for the electromigration mass transport. Along the diffusion paths, the fluxes of vacancies where calculated including mechanical stress and electromigration driving forces using a finite difference method. Positive flux divergent sites of the FDM lattice are treated as void nucleation sites after a critical vacancy concentration is reached. The resistance increase due to void growth was calculated using a cellular automaton, masking current free regions as quasi voids and adding the resistance of the slices of the lattice normal to the electron flow direction in series. A parallel computing environment was used to generate large numbers of interconnect models in order to obtain a pool of data for statistical analysis of interconnect lifetimes. The results of this analysis will be shown