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HL: Fachverband Halbleiterphysik

HL 85: Poster Session II

HL 85.108: Poster

Thursday, March 17, 2011, 18:00–21:00, P4

Triple dot structures from CMOS-compatible SOI-FETs — •Dharmraj Kotekar-Patil¹, Matthias Ruoff¹, Stefan Jauerneck¹, Dieter Kern¹, David Wharam¹, Marc Sanquer² und Maud Vinet³ — ¹Eberhard Karls Universität, Tübingen — ²CEA INAC, Grenoble, France — ³CEA LETI, Grenoble, France

We report on electronic transport in triple quantum dots in series created by three closely spaced top gates on the same SOI-nanowire. Each quantum dot is individually characterised as a single electron transistor(SET) exhibiting clear Coulomb blockade oscillations. We also study the electrostatic coupling between 2 dots at a time with the third dot kept at a fixed bias. From charge stability measurements for each combination of gates, interdot capacitances and cross capacitances between dots and gates are extracted and correlated with geometrical models. Device fabrication is compatible with advanced CMOS processes so the devices may serve as building blocks for charge based quantum computes or quantum cellular automata (QCA).