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HL: Fachverband Halbleiterphysik
HL 85: Poster Session II
HL 85.81: Poster
Donnerstag, 17. März 2011, 18:00–21:00, P4
Low temperature Coulomb anomaly in CMOS compatible silicon quantum dots — •Stefan Jauerneck1, Matthias Ruoff1, Dharmraj Kotekar-Patil1, David Wharam1, Dieter Kern1, Marc Sanquer2, and Maud Vinet3 — 1Eberhard Karls Universität, Tübingen — 2CEA INAC, Grenoble, France — 3CEA LETI, Grenoble, France
Due to the ever decreasing sizes in CMOS technology, it has become possible to investigate transport in small geometries, where both Coulomb charging and quantum-mechanical effects play an important role. Furthermore fluctuations in the number of dopants in the active region of transistors are important and such dopants may act as an ultimate quantum dot with huge charging energies as compared to artificial silicon islands and lead to high temperature operation.
We report on transport measurements of nanoscale enhancement mode nanowire SOI-FETs, which clearly show Coulomb blockade behaviour. The size of the Coulomb diamonds is modulated in source-drain direction with an enveloping diamond structure, which may be explained by Coulomb charging effects due to a dopant in or near the barrier. Additionally the measurements feature regularly spaced lines with a slope dVsd/dVg >1. We have investigated these features with respect to the symmetry of the measurement setup and show that they become independent of source-drain bias when the dot is symmetrically biased. Alternative explanations for this behaviour are considered.