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HK: Fachverband Physik der Hadronen und Kerne

HK 52: Poster - Instrumentation I

HK 52.20: Poster

Mittwoch, 6. März 2013, 16:45–19:00, HSZ 2.OG

The TIGER Trigger Processor for the CAMERA Detector at COMPASS-II — Tobias Baumann, Maximilian Büchele, Horst Fischer, Matthias Gorzellik, Tobias Grussenmeyer, Florian Herrmann, Philipp Jörg, Paul Kremser, Tobias Kunz, Christoph Michalski, •Sebastian Schopferer, and Tobias Szameitat — Physikalisches Institut der Universität Freiburg

In today's nuclear and high-energy physics experiments the background-induced occupancy of the detector channels can be quite high; therefore it is important to have sophisticated trigger subsystems which process the data in real-time to generate trigger objects for the global trigger decision. In this work we present a FPGA based low-latency trigger processor for the COMPASS-II experiment.

TIGER is a high-performance trigger processor that was developed to fit perfectly in the GANDALF framework and extend its versatility. It is designed as a VXS module and is allocated to the central VXS switch slot, which has a direct link from every payload slot. The synchronous transfer protocol was optimized for low latencies and offers a bandwidth of up to 8 Gbit/s per link. The centerpiece of the board is a Xilinx Virtex-6 SX315T FPGA, offering vast programmable logic, embedded memory and DSP resources. It is accompanied by DDR3 memory, a COM Express CPU and a MXM GPU. Besides the VXS backplane ports, the board features two SFP+ transceivers, 32 LVDS inputs and 32 LVDS outputs to interface with the global trigger system and a Gigabit Ethernet port for configuration and monitoring.

Supported by BMBF and EU FP7 (Grant Agreement 283286).