Dresden 2013 – scientific programme
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T: Fachverband Teilchenphysik
T 63: Halbleiterdetektoren: Forschung und Entwicklung 3
T 63.7: Talk
Tuesday, March 5, 2013, 18:15–18:30, GER-007
Test results of the 3D IC prototype FETC4 for the ATLAS experiment at HL-LHC — •Theresa Obermann1, David Arutinov1, Malte Backhaus1, Marlon Barbero2, Tomasz Hemperek1, Hans Krüger1, Laura Gonella1, Fabian Hügging1, Carlos Marinas1, and Norbert Wermes1 — 1Physikalisches Institut Universität Bonn — 2CPPM Marseille
For the high luminosity upgrade of the LHC a new front-end IC for the innermost pixel layers is needed. The increased hit rates and radiation levels close to the interaction point challenge the design of this new IC. A prototype pixel IC has been developed using 3D electronics. The concept of 3D is to split a circuit into several tiers and to integrate them vertically with Through Silicon Vias (TSVs) and inter-tier bonding. A direct advantage of 3D integration is the possibility to implement analog and digital circuits on separate tiers leading to a smaller pixel size and reduced crosstalk. For the first time both tiers of a two layer 3D IC have been operated together and the results of the characterization will be shown in this talk.