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T: Fachverband Teilchenphysik

T 77: DAQ, Trigger und Elektronik 2

T 77.7: Vortrag

Donnerstag, 7. März 2013, 18:15–18:30, GER-039

Data Handling Hybrid: FPGA Based Read-Out System for the Silicon Pixel Detector in Belle II Experiment. — •Dmytro Levit, Igor Konorov, Boris Zhuravlev, Stefan Huber, and Stephan Paul — Physikdepartment E18, Technische Universität München

An FPGA based interface system, the Data Handling Hybrid, is developed as a part of the pixel detector read-out chain that will be installed in the Belle II experiment. The two level system is build in MicroTCA format. The first level multiplexes four data streams that are received from the DEPFET module. The maximal expected data rate is 1.416 Gbps per module. The control, pedestals upload, and initialization of the front-end electronics on the DEPFET module are performed over JTAG interface. The second layer aggregates five 6.25 Gbps data streams from the first level cards and performs sub-event building therefore averaging data rate on four outgoing links due to differences in detector occupancy. The system also performs synchronous trigger and clock distribution over the high speed serial links. The control over the system is performed over ethernet by integrating the IPBus stack and EPICS framework.

The project is supported by the BMBF, Maier-Leibnitz-Laboratorium of the University of Munich, and Technical University of Munich as well as the Exzellenzcluster "Origin and Structure of the Universe".