Jena 2013 – wissenschaftliches Programm
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P: Fachverband Plasmaphysik
P 18: Poster: Plasmatechnologie
P 18.5: Poster
Donnerstag, 28. Februar 2013, 14:00–16:00, Poster EG
Plasma-etched silicon-on-insulator structures for integration of photonic components in a high-performance BiCMOS process — •Harald Richter1, David Stolarek1, Mirko Fraschke1, René Eisermann1, Steffen Marschmeyer1, Dieter Knoll1, Katrin Schulz1, Lars Zimmermann1,2, and Bernd Tillack1,2 — 1IHP, Im Technologiepark 25, 15236 Frankfurt (Oder) — 2TU Berlin, HFT 4, Einsteinufer 25, 10587 Berlin
A combination of Si photonic and electronic components on the same chip is a prospective approach for processing of optoelectronic integrated circuits. The idea of a compact integration of both components is based on the compatibility of silicon-on-insulator (SOI) photonics with highly integrated microelectronic technologies. The integration of photonic building blocks with a state-of-the-art BiCMOS process requests a combination of local SOI regions in a bulk Si environment. Plasma etching is a technological key process step for realization both local SOI areas and high-quality photonic modules.
The present work is focused on plasma etch process development and optimization for different Si photonic components (rib waveguides, nanowires, ring resonators, coupling structures and photonic crystals). Different hard masks for several etch processes were tested and optimized. Experiments have shown the mask opening step is significant for preparation of high-performance Si photonic modules. Moreover, optimized plasma etching procedure developed for creation of local SOI areas is described. Damage-free plasma etching is an essential requirement for subsequent high-quality Si epitaxy.