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DS: Fachverband Dünne Schichten

DS 14: Focus Session: Functionalized Semiconductor Nanowires I (jointly with HL)

DS 14.4: Topical Talk

Dienstag, 12. März 2013, 11:15–11:45, H8

Semiconducting Nanowire Heterostructures on Silicon - From Growth to Devices — Heinz Schmid, Kirsten Moselund, Cedric Bessire, Pratyush Das Kanungo, Philipp Mensch, Siegfried Karg, Mattias Borg, Volker Schmidt, and •Heike Riel — IBM Research - Zurich, Rüschlikon, Schweiz

Bottom-up grown nanowires (NWs) are very attractive materials for direct integration of III-V semiconductors on Si thus opening up new possibilities for the fabrication and design of electronic and optoelectronic devices. The NW geometry allows the growth of abrupt heterostructures with large lattice mismatch and offers an ideal geometry for field-effect transistors (FETs) from an electrostatics perspective. These characteristics are especially important for tunnel FETs (TFETs) which today are being considered the most promising steep-slope devices. TFETs can achieve a subthreshold swing of less than 60 mV/dec and are thus attractive for low-voltage operation thereby offering significant power dissipation savings. We present our results on the fabrication and characterization of vertical InAs-Si heterojunction nanowire (NW) Esaki tunnel diodes and TFETs with InAs as low bandgap source. InAs NWs are grown on Si <111> by selective area epitaxy within e-beam patterned SiOx openings by MOCVD where the doping level is controlled in-situ. Furthermore, a new approach based on nanotube templates has been developed to grow axial III/V nanowire homo- and hetero-structures on silicon with high quality. The device fabrication will be discussed and the latest electrical results of tunnel diodes and TFETs will be presented.