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HL: Fachverband Halbleiterphysik
HL 83: Transport I
HL 83.1: Vortrag
Donnerstag, 14. März 2013, 15:00–15:15, H16
Electrical properties of InAs nanowires and their interband tunneling across Si heterojunctions for future FET devices — •Pascal Wittlich1, Stefanie Morkötter1, Tao Yang1, Julian Treu1, Simon Hertenberger1, Verena Hintermayr1, Philipp Geselbracht1, Max Bichler1, Gerhard Abstreiter1,2, and Gregor Koblmüller1 — 1Walter Schottky Institut and Physik Department, TU München, Garching, Germany — 2TUM Institute for Advanced Study, Garching, Germany
We present recent results on the electrical transport characteristics of MBE grown InAs nanowires on Si substrate. Several investigations in different NW device geometries are performed, either as vertical free-standing NW devices for all-surround gate NW-FET configurations or as transferred nanowires for fabrication of both back- and top-gated NW-FETs in horizontal geometry. For the latter, we show dependencies of growth parameters, microstructure, contact metal, and surface passivation schemes (high-k dielectrics) on the total NW-FET resistance as well as transconductance and electron mobility. For vertical devices directly integrated on Si, we report a detailed study of interband tunneling across p-type Si/n-InAs heterojunctions as a function of substrate doping level and NW diameter. For large doping levels we find the possibility for large tunnel currents and Esaki-type tunneling with explicit negative differential resistance in thin NWs [1]. These results open viable routes for future high-performance III/V-on-Si tunnel-FET devices.
T. Yang et al, Appl. Phys. Lett. 101, 233102 (2012).