Regensburg 2013 – scientific programme
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TT: Fachverband Tiefe Temperaturen
TT 12: Poster Session Superconductivity
TT 12.5: Poster
Monday, March 11, 2013, 15:00–19:00, Poster D
Self-Planarized Process for the Fabrication of Josephson Junction Devices — •Michael Merker, Johannes Maximilian Meckbach, Simon Buehler, Konstantin Il’in, and Michael Siegel — Institut für Mikro- und Nanoelektronische Systeme (IMS), Karlsruher Institut für Technologie (KIT), Germany
High performance Josephson junction (JJ) devices require good control of lateral dimensions. Various JJ devices can benefit from sub-µm feature sizes. In our conventional Nb/Al-AlOx/Nb process, the minimum feature size is however limited by the step height of the layers beneath.
In order to overcome this constraint, we refined our process, resulting in almost flat surfaces at intermediate processing steps without the need for time consuming chemical-mechanical polishing (CMP).
Sub-µm feature sizes can be achieved using electron beam lithography (EBL). Due to the application of mix & match lithography, (combination of EBL and photolithography), the turn-around time is not increased significantly compared to our conventional process.
Transport properties of sub-µm JJs at 4.2 K will be presented. Our JJ process yields excellent quality parameters with sub-µm feature sizes even in the third metal layer, and is therefore very promising for fabricating sub-µm JJs for quantum devices such as SQUIDs or receiver devices.