Regensburg 2013 – scientific programme
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TT: Fachverband Tiefe Temperaturen
TT 35: Graphene - Characterization and Devices (jointly with DS, HL, MA, and O)
TT 35.11: Talk
Wednesday, March 13, 2013, 12:15–12:30, H17
Tailoring the graphene/silicon carbide interface for monolithic wafer-scale electronics — •Stefan Hertel1, Daniel Waldmann1, Johannes Jobst1, Andreas Albert1, Matthäus Albrecht1, Sergey Reshanov2, Adolf Schöner2, Michael Krieger1, and Heiko B. Weber1 — 1Chair for Applied Physics, Erlangen, Germany — 2ACREO AB, Kista, Sweden
The vision of graphene as future material for electronic devices is derived from impressive material parameters. However, it is evident that graphene will not readily take over the role of a semiconductor. In particular, an efficient switch is lacking due to graphene’s missing bandgap.
By focusing not only on the graphene layer, but considering the silicon carbide (SiC) substrate as an essential part of the system, we developed an easy scheme to fabricate transistors with high ON/OFF ratio - suited for logic - by tailoring the interface between SiC and the graphene layer [1]. Therefore we currently work with two graphene materials on SiC: as grown monolayer graphene (MLG) and hydrogen intercalated quasi-freestanding bilayer graphene (QFBLG). We proved the high-quality ohmic contact of MLG to n-type SiC and also characterized the Schottky-like behavior of QFBLG.
Using these components we are currently able to demonstrate transistors with ON/OFF ratios exceeding 104 at room temperature in normally-on and normally-off operation mode. We present a concept for inverters using a resistor-transistor logic scheme.
[1] S. Hertel et al., Nature Communications 3, 957 (2012)