Heidelberg 2015 – wissenschaftliches Programm
Bereiche | Tage | Auswahl | Suche | Aktualisierungen | Downloads | Hilfe
HK: Fachverband Physik der Hadronen und Kerne
HK 48: Poster
HK 48.56: Poster
Mittwoch, 25. März 2015, 17:00–19:00, C/Foyer
The STS-XYTER ASIC -- a dedicated front-end chip for the CBM Silicon Tracking System — •Iurii Sorokin1,2, Krzysztof Kasinski3, Rafal Kleczek3, Piotr Otfinowski3, Volker Kleipa1, and Robert Szczygiel3 for the CBM collaboration — 1GSI Helmholtzzentrum für Schwerionenforschung GmbH, Darmstadt — 2Kiev Institute for Nuclear Research, Kiev — 3AGH University of Science and Technology, Cracow
The STS-XYTER is a 128-channel charge-sensitive front-end chip, designed specifically for the Silicon Tracking System of the CBM experiment. The chip features a self-triggering architecture, which enables it to measure the signal amplitude and the time of arrival in each input channel autonomously, as soon as the signal in the given channel exceeds a predefined threshold. The design time resolution is about 10 ns, the dynamic range is 15 fC, and the amplitude is digitized with an integrated 5-bit flash ADC. Two shapers with distinct rise times are used to achieve low rate of noise hits in combination with the good time resolution, and low power consumption (6 mW/channel). The characterization of chips samples is ongoing. An overview of the chip architecture as well as the operation principle will be given.