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HK: Fachverband Physik der Hadronen und Kerne
HK 59: Instrumentation 17
HK 59.6: Vortrag
Donnerstag, 26. März 2015, 18:30–18:45, M/HS1
Design and prototyping of a readout aggregation ASIC — Frank Lemke1, •Sven Schatral1, Indranil Som2, Tarun Bhattacharyya2, and Ulrich Bruening1 for the CBM collaboration — 1ZITI, Universitaet Heidelberg — 2Indian Institute of Technology Kharagpur
In close collaboration between the Indian Institute of Technology Kharagpur (IITKGP) and the Institute for Computer Engineering (ZITI) at the University of Heidelberg a readout aggregation ASIC was designed. This happened in the context of the Compressed Baryonic Matter (CBM) experiment at the Facility for Antiproton and Ion Research (FAIR). The ASIC is designed in 65nm TSMC technology. Its miniASIC tapeout to verify the analog and high-speed components is scheduled to the first quarter of 2015. This mixed-signal ASIC consists of a full-custom 5Gb/s serializer/deserializer, designed by the IITKGP including design elements such as phase-locked loop, bandgap reference, and clock data recovery, and a digital designed network communication and aggregation part designed by the ZITI. In addition, there are test structures and an I2C readout integrated to ease bring up and monitoring. A specialty of this test ASIC is the aggregation of links featuring different data rates, running with bundles of 500 MB/s LVDS. This enables flexible readout setups of mixed detectors respectively readout of various chips. As communication protocol, a unified link protocol is used including control messages, data messages, and synchronization messages on an identical lane. The design has been simulated, verified, and hardware emulated using Spartan 6 FPGAs.