Wuppertal 2015 – scientific programme
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T: Fachverband Teilchenphysik
T 61: DAQ
T 61.6: Talk
Wednesday, March 11, 2015, 18:00–18:15, G.10.07 (HS 5)
Yarr: A PCIe based readout system for semiconductor tracking systems — •Timon Heim1,2, Peter Maettig1, and Heinz Pernegger2 — 1Bergische Universitaet Wuppertal, Wuppertal, Germany — 2CERN, Geneva, Switzerland
The Yarr readout system is a novel DAQ concept, using an FPGA board connected via PCIe to a computer, to read out semiconductor tracking systems. The system uses the FPGA as a reconfigurable IO interface which, in conjunction with the very high speed of the PCIe bus, enables a focus of processing the data stream coming from the pixel detector in software. Modern computer system could potentially make the need of custom signal processing hardware in readout systems obsolete and the Yarr readout system showcases this for FE-I4 chips, which are state-of-the-art readout chips used in the ATLAS Pixel Insertable B-Layer and developed for tracking in high multiplicity environments. The underlying concept of the Yarr readout system tries to move intelligence from hardware into the software without the loss of performance, which is made possible by modern multi-core processors. The FPGA board firmware acts like a buffer and does no further processing of the data stream, enabling rapid integration of new hardware due to minimal firmware minimisation.