Bereiche | Tage | Auswahl | Suche | Aktualisierungen | Downloads | Hilfe

HK: Fachverband Physik der Hadronen und Kerne

HK 54: Instrumentation XV

HK 54.4: Vortrag

Donnerstag, 17. März 2016, 14:45–15:00, S1/01 A2

ALICE High-Level Trigger Readout and FPGA Processing in Run 2 — •Heiko Engel and Udo Kebschull for the ALICE collaboration — IRI, Goethe-Universitaet Frankfurt

The ALICE experiment uses the optical Detector Data Link (DDL) protocol to connect the detectors to the computing clusters of Data Acquisition (DAQ) and High-Level Trigger (HLT). The interfaces between the clusters and the optical links are realized with FPGA boards. HLT has replaced all of its interface boards with the Common Read-Out Receiver Card (C-RORC) for Run 2. This enables the read-out of detectors at higher link rates and allows to extend the data pre-processing capabilities, like online cluster finding, already in the FPGA. The C-RORC is integrated transparently into the existing HLT data transport framework and the cluster monitoring and management infrastructure. The board is in use since the start of LHC Run 2 and all ALICE data from and to HLT as well as all data from the TPC and the TRD is handled by C-RORCs. This contribution gives an overview on the firmware and software status of the C-RORC in the HLT.