Hamburg 2016 – scientific programme

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T: Fachverband Teilchenphysik

T 42: Trigger und DAQ II

T 42.1: Talk

Monday, February 29, 2016, 16:45–17:00, VMP11 HS

The Data Handling Processor of the Belle II DEPFET Detector — •Leonard Germic, Tomasz Hemperek, Tetsuichi Kishishita, Botho Paschen, Florian Lütticke, Hans Krüger, Carlos Marinas, and Norbert Wermes for the Belle II collaboration — Universität Bonn

A two layer highly granular DEPFET pixel detector will be operated as the innermost subsystem of the Belle II experiment, at the new Japanese super flavor factory (SuperKEKB). Such a finely segmented system will allow to improve the vertex reconstruction in such ultra high luminosity environment but, at the same time, the raw data stream generated by the 8 million pixel detector will exceed the capability of real-time processing due to its high frame rate, considering the limited material budged and strict space constrains. For this reason a new ASIC, the Data Handling Processor (DHP) is designed to provide data processing at the level of the front-end electronics, such as zero-suppression and common mode correction. Additional feature of the Data Handling Processor is the control block, providing control signals for the on-module ASICs used in the pixel detector. In this contribution, the description of the latest chip revision in TSMC 65 nm technology together with the latest test results of the interface functionality tests are presented.