Bereiche | Tage | Auswahl | Suche | Aktualisierungen | Downloads | Hilfe

Q: Fachverband Quantenoptik und Photonik

Q 31: Poster: Quantum Optics and Photonics I

Q 31.45: Poster

Dienstag, 7. März 2017, 17:00–19:00, P OG1+2

Establishing gate fabrication for advanced multi-layer SiGe Quantumdots — •Philip Schrinner^{1, 3}, Arne Hollmann¹, Tim Leonhardt¹, Stefan Trellenkamp², and Lars Schreiber¹ — ¹JARA Institute for Quantum Information, RWTH Aachen University, Germany — ²Peter Grünberg Institute (PGI-8), FZ Jülich, Germany — ³Center for Nanotechnology, Westfälische Wilhelms-Universität Münster, Germany

Electron spin qubits in electrostatically defined Si/SiGe quantum dots combine excellent coherence times (T2* = 1 mu s [1]), small feature size and CMOS compatibility and therefore promise to be an excellent candidate for a scalable semiconductor based universal quantum computer. In comparison to previous fabrication layouts an advanced multi-layer gate design has been shown to further decrease the number of gates per qubit, the size of the gate pattern, charge noise and gate cross-coupling [2,3]. My work focuses on the development of such fabrication technology by isolating three expected fabrication challenges and address them with the fabrication of corresponding test structures. I will present methods to fabricate an array of sub 30 nm wide gates with a sub 70 nm pitch, electrically isolated by a few nano-meter thick oxide layer and the alignment precession of gate layers with respect to each other. As a result, I will give all the required ingredients to fabricate multi-layer quantum dot gate patterns for multi-qubit devices. [1] E. Kawakami et al., Nature Nano-tech. 9, 666 (2014). [2] G. Borselli et al., Nanotechnology 26, 375202 (2015). [3] D. M. Zajac et al., Appl. Phys. Lett. 106, 223507 (2015).