Berlin 2018 – scientific programme

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HL: Fachverband Halbleiterphysik

HL 37: Oxide Semiconductors

HL 37.6: Talk

Thursday, March 15, 2018, 10:45–11:00, EW 203

Towards high-performance printed in-plane and vertical MOSFETs — •Felix Neuper, Robert Kruk, Horst Hahn, and Ben Breitung — Institute of Nanotechnology, Karlsruhe Institute of Technology, Hermann-von-Helmholtz-Platz 1, 76344 Eggenstein-Leopoldshafen, Germany

Integrating printed MOSFETs in complex circuits has been successfully demonstrated recently by our group [1] and novel transistor architectures are under development to further improve their performance. As one way to optimize device behaviour a printed vertical porous channel approach has been shown [2], enhancing key parameters such as channel length, on-off-ratio, and high current densities.

As Atomic layer deposition (ALD) is able to coat complex porous structures with high aspect ratios, in this presentation we show how changing from electrolyte gating to ALD-processed dielectric gating in printed MOSFETs vastly increases switching speeds and reduces leakage currents, as well as providing long-term reliability and stability towards environmental influences. Despite the usage of dielectrics, the devices are fully operational at low voltages (<= 1V) allowing applications such as smart packaging and wearable devices.

[1] Gabriel C M et al.Appl. Phys. Lett. 111, 102103 (2017) [2] Tessy. Baby et al., Advanced Materials, 29 (4), 1603858 (2017)