Bochum 2018 – scientific programme

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HK: Fachverband Physik der Hadronen und Kerne

HK 21: Instrumentation VIII

HK 21.4: Talk

Tuesday, February 27, 2018, 15:00–15:15, HZO 90

Time resolution of the DiRICH MAPMT readout with and without WLS coverage * — •Adrian Amatus Weber for the CBM collaboration — Justus-Liebig-Universität Gießen

The HADES experiment during FAIR phase 0 and later the CBM experiment will employ RICH detectors for high quality electron identification. Photon detection is performed by H12700 Hamamatsu MAPMTs. A new FPGA-TDC based readout scheme has been developed with the 32 channel DiRICH readout module as its core component. Signal discrimination, time- and time-over-thershold measurement, as well as digital data handling, are all implemented on a central Lattice ECP5 FPGA. Good timing resolution requires a careful timing calibration taking into account nonlinearities in the TDC-FPGA design itself, temperature and voltage variations, as well as channel-to-channel delays has to be performed. We developed an FPGA based linear calibration of the TDCs that could successfully be tested on a TrbSc board. Timing precision in the range of 20-30 ps is achieved. A proximity focusing CBM RICH prototype has been tested at COSY using the full FPGA-TDC readout for 12 MAPMTs, partially covered with WLS coatings in order to enhance the UV sensitivity. Timing precision of the MAPMTs and readout electronics in-beam with and without WLS coating has been measured. The timing precision is on the order of 500 ps. Adding the WLS layer one measures an additional fast (2.4 ns) fluorescence decay component.

* supported by BMBF(05P15RGFCA) and HGS-HiRe; for the CBM, HADES and TRB collaboration