Bochum 2018 – scientific programme

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HK: Fachverband Physik der Hadronen und Kerne

HK 42: Instrumentation XIII

HK 42.5: Talk

Wednesday, February 28, 2018, 17:30–17:45, Audimax H1

ALICE HLT hardware cluster finding in Run 2 and HLS evaluations for Run 3 — •Heiko Engel for the ALICE collaboration — IRI, Universität Frankfurt am Main

The ALICE High Level Trigger (HLT) is a computing cluster for online reconstruction, compression and calibration of detector data. The main input and output interface of the HLT are PCI-Express based FPGA readout boards with serial optical links. The HLT uses these FPGAs for online data preprocessing of detector data already in the input FPGA. A cluster finding algorithm processes data from the Time Projection Chamber (TPC) detector on the fly. This cluster finding algorithm was extended to provide improved noise resiliance and increased data compression capabilities. In combination with software based adjustments these development raised the overall data compression ratio of the HLT from a factor of around 4 to above 7. This contribution describes the improvements of the existing ALICE HLT hardware cluster finder for Run 2 as well as cluster finder developments for the Run 3 ALICE readout evaluating High Level Synthesis (HLS/OpenCL) for data preprocessing in FPGAs.