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T: Fachverband Teilchenphysik

T 89: Pixel Detectors IV

T 89.6: Vortrag

Donnerstag, 18. März 2021, 17:15–17:30, Tn

ATLAS ITk-Pixel read-out systems with FELIX and lpGBT — Jörn Grosse-Knetter, Arnulf Quadt, and •Ali Skaf — II. Physikalisches Institut, Georg-August-Universität Göttingen, Göttingen, Germany

The ATLAS Phase II upgrade ITk-Pixel read-out chain is based on the use of ITkSoftware commanding the ITkPix front-end (FE) chips through FPGA off-detector communication boards, called FELIX and high-speed transceiver chips called lpGBT. This work describes the road-map, and the relevant intermediate steps, enabling the achievement of the final system. An lpGBT FPGA full-featured emulator using a Xilinx Ultrascale+ KCU116 development board is used as an alternative to the real lpGBT ASIC, included in the CERN VLDB+ boards or other prototypes of the final Pixel optoboards.

Waiting for the ITkPix, modules with the prototype FE RD53A were used. These modules are connected either to the lpGBT emulator implemented in a KCU116 with a mezzanine board, or to the lpGBT ASIC (e.g. VLDB+), through a special Breakout Board, which was also designed in-house. Furthermore, in order to configure lpGBT ASIC or Emulator, a Java GUI application was also developed using an existing USB-I2C dongle. All these developments aim, in particular, at the operation of and test measurements with an RD53A demonstrator, a small prototype system containing about 100 FEs, on the way to the target ITk-Pixel full-scale readout system. Details of the different system components are given, along with the different experimentation setups that were tested.