SMuK 2023 – wissenschaftliches Programm
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T: Fachverband Teilchenphysik
T 85: DAQ, Data Techniques
T 85.2: Vortrag
Mittwoch, 22. März 2023, 17:45–18:00, HSZ/0301
A Simulink Hardware-in-the-Loop Demonstrator Setup for Detector System Analysis — •Aravinda Lasya Indukuri1, Florian Rössing1, Christian Grewing1, André Zambanini1, and Stefan van Waasen1,2 — 1ZEA-2, Forschungszentrum Jülich — 2NTS, Universität Duisburg- Essen
In our work, we study the influence of different parameters in read-out chains of particle detectors, alongside with studying digital processing methods for feature extraction. As described in our adjacent contribution, we are using Matlab and Simulink to model different aspects of the read-out chain. In order to verify the developed processing methods and setup a demonstrator , we are implementing the digital domain of the models on an FPGA in an FPGA-in-the-loop workflow. Matlab and Simulink provide tools like HDL Coder and HDL Verifier to automatically generate HDL code, select an external simulator to simulate the generated HDL code, implement it on an FPGA, and compare the results with the Simulink reference model. To verify the whole read-out chain model, we are setting up a hardware-in-the-loop model with an arbitrary waveform generator and an ADC along with an FPGA that will be stimulated and verified over Matlab and Simulink. We will also be working on automating the workflow for different event models and signal processing methods. In this contribution, we will present an automated Matlab-Simulink workflow for an FPGA-in-the-Loop demonstrator setup to verify simulink models in hardware, efficiency of HDL coder in comparison to a handwritten HDL code, and our progress on the Hardware-in-the-Loop demonstrator setup.