Berlin 2024 – scientific programme
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QI: Fachverband Quanteninformation
QI 18: Poster II
QI 18.29: Poster
Wednesday, March 20, 2024, 11:00–14:30, Poster A
Fabrication of 3D-integrated superconducting quantum circuits in flip-chip geometry — •Agata Skoczylas1,2, Léa Richard1,2, Niklas Bruckmoser1,2, Leon Koch1,2, David Bunch1,2, Lasse Södergren1,2, and Stefan Filipp1,2 — 1Technical University of Munich, TUM School of Natural Sciences, Physics Department, 85748 Garching, Germany — 2Walther-Meißner-Institut, Bayerische Akademie der Wissenschaften, 85748 Garching, Germany
To address traditionally challenging problems using quantum computing, it is essential for quantum processors to scale up significantly. However, the current superconducting planar geometry makes it impossible to route the numerous control and readout lines required for a larger number of qubits.
Employing techniques from 3D-integration, such as flip-chip bump bonding, is needed to overcome this issue. However, implementing such technology for superconducting quantum circuits while preserving high coherence times introduces new challenges during fabrication. Indeed, to enable flip-chip bump bonding, essential components, such as indium bumps and spacers, must be added to standard circuit elements. Additionally, achieving precise horizontal and vertical alignment while bonding is essential to maintain accurate parameter targeting.
Here, we present the fabrication processes of thermally evaporated indium bumps and polymer spacers. Moreover, we review the fabrication of superconducting coplanar waveguide resonators in a flip-chip geometry and discuss the impact of 3D-integration on resonators quality factors and frequency targeting.
Keywords: Fabrication; Scaling; 3D integration; Flip-chip bonding