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Q: Fachverband Quantenoptik und Photonik

Q 38: Poster IV

Q 38.9: Poster

Mittwoch, 13. März 2024, 17:00–19:00, KG I Foyer

Ion trap chips on dielectric substrates for double-well coupling experiments — •Michael D.J. Pfeifer^{1, 2}, Simon Schey^{1, 3}, Matthias Dietl^{1, 2}, Fabian Anmasser^{1, 2}, Jakob Wahl^{1, 2}, Marco Valentini², Martin van Mourik², Thomas Monz², Fabian Laurent¹, Clemens Rössler¹, Yves Colombe¹, and Philipp Schindler² — ¹Infineon Technologies Austria AG, Villach, Austria — ²University of Innsbruck, Innsbruck, Austria — ³Stockholm University, Stockholm, Sweden

We report on surface ion trap chips, industrially fabricated at Infineon Technologies [1,2], that are capable to generate a two-well potential for trapping ions. The chips are designed for investigating rf shuttling in the large separation and in the coupling regimes as element of a scalable architecture [1]. The optimization of the design parameters of a surface ion trap in the rf coupling regime with optimal ion height and ion-ion distance is discussed.

The dielectric substrates Fused Silica and Sapphire are used in the fabrication of the chips. The status of the microfabrication on these materials is discussed, with a focus on optical and electric properties, as well as on wafer bow.

[1] Ph. Holz, S. Auchter et al., Adv. Quantum Technol. 3, 2000031 (2020)

[2] S. Auchter, C. Axline et al., Quantum Sci. Technol. 7, 035015 (2022)

Keywords: microfabrication; industrial fabrication; scaling; ion trap chip; Sapphire