Göttingen 2025 – wissenschaftliches Programm

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T: Fachverband Teilchenphysik

T 77: Data, AI, Computing, Electronics VIII (Fast ML, Triggers)

T 77.7: Vortrag

Donnerstag, 3. April 2025, 17:45–18:00, VG 2.102

Implementation of a two-level AI-enhanced trigger on a single chip with AI cores for live reconstruction — •Patrick Schwäbig for the Lohengrin collaboration — Physikalisches Institut, Universität Bonn, Deutschland

For years, data rates generated by modern detectors and the corresponding readout electronics exceeded by far the limits of data storage space and bandwidth available in many experiments. The approach of using fast triggers to discard uninteresting and irrelevant data remains a solution used to this day: Using FPGAs, ASICs or directly the readout chip, a fixed set of rules based on low level parameters is applied as a pre-selection. In contrast to this stands live track reconstruction for triggering, which was rarely possible due to limited computation power in the past. With the emergence of highly parallelized processors for AI inference, attempts to sufficiently accelerate tracking algorithms become viable. The AMD Versal Adaptive Compute Acceleration Platform (ACAP) is one such technology and combines FPGA and CPU resources with dedicated AI cores. Our approach is to implement a two-level trigger on a single chip by utilizing the tightly integrated combination of FPGA and AI cores to profit from their individual strengths. In this talk our concept for a two-level trigger setup, implemented on an AMD VC1902, including quantized AI algorithms and Timepix3 readout, will be shown. They will be used in an envisioned mid-size ultra-high rate fixed-target dark matter experiment (Lohengrin) at the ELSA accelerator at the University of Bonn.

Keywords: AI; FPGA; trigger; reconstruction; Timepix3