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DS: Fachverband Dünne Schichten

DS 48: Oxide Semiconductors for Device and Energy Applications II
(Joint session of DS and HL, organized by DS)

DS 48.7: Vortrag

Donnerstag, 10. März 2016, 16:30–16:45, H11

Oxygen Vacancies in the Ultrathin SiO₂ Interfacial Layer of High-K/Metal Gate CMOS Devices — •Florian Lazarevic^1,2, Roman Leitsmann^1,2, Philipp Plänitz¹, and Michael Schreiber² — ¹MATcalc, AQcomputare GmbH, Annaberger Str. 240, 09125 Chemnitz, Germany — ²Institute of Physics, Chemnitz University of Technology, 09107 Chemnitz, Germany

We study oxygen vacancy defect levels in ultrathin SiO₂ layers in metal-oxide-semiconductor devices. First principles calculations were performed to model a Si/SiO₂/HfO₂ gate stack and a SiO₂ bulk reference system. The extremely thin SiO₂ layer thickness and dissimilar structural and electronic properties of the adjacent layers (namely Si and HfO₂) result in a degeneration and stabilization of certain SiO₂ bulk defects. We find that partial H passivation of the vacancies additionally stabilizes defects energetically which are related to the leakage current in CMOS devices. Furthermore the incorporation of F atoms has a large influence on the stability of H passivated SiO₂ defects.